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- [2] Preparation, Imaging, and Design Extraction of the Front-End-of-Line and Middle-of-Line in a 14 nm Node FinFET Device PROCEEDINGS OF THE 2021 IEEE INTERNATIONAL CONFERENCE ON PHYSICAL ASSURANCE AND INSPECTION ON ELECTRONICS (PAINE), 2021,
- [7] Post-Routing Back-End-Of-Line Layout Optimization for Improved Time-Dependent Dielectric Breakdown Reliability DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION VII, 2013, 8684
- [9] Optimal Accelerated Test Regions for Time-Dependent Dielectric Breakdown Lifetime Parameters Estimation in FinFET Technology 2018 XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS), 2018,