共 50 条
- [32] MEMORY ACCESS COALESCING - A TECHNIQUE FOR ELIMINATING REDUNDANT MEMORY ACCESSES SIGPLAN NOTICES, 1994, 29 (06): : 186 - 195
- [33] A compiler for multiple memory models CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2004, 16 (2-3): : 197 - 220
- [34] Validation of memory accesses through symbolic analyses 1600, Association for Computing Machinery, 2 Penn Plaza, Suite 701, New York, NY 10121-0701, United States (49):
- [35] Parallel memory implementation for arbitrary stride accesses 2006 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING AND SIMULATION, PROCEEDINGS, 2006, : 1 - +
- [36] A Unified Approach to Eliminate Memory Accesses Early PROCEEDINGS OF THE PROCEEDINGS OF THE 14TH INTERNATIONAL CONFERENCE ON COMPILERS, ARCHITECTURES AND SYNTHESIS FOR EMBEDDED SYSTEMS (CASES '11), 2011, : 55 - 64
- [38] FPGA SAR processor with window memory accesses 2007 IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES, AND PROCESSORS, 2007, : 95 - 100
- [39] Optimization of data accesses in reflective memory systems TENCON 2006 - 2006 IEEE REGION 10 CONFERENCE, VOLS 1-4, 2006, : 1344 - +
- [40] Parallel memory architecture for arbitrary stride accesses PROCEEDINGS OF THE 2006 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2006, : 65 - +