A low-cost jitter measurement technique for BIST applications

被引：4

作者：

Huang, Jiun-Lang ^{[1
]}

Huang, Jui-Jer

Liu, Yuan-Shuang

机构：

[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 106, Taiwan

[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan

[3] VIA Networking Technol Inc, Taipei, Taiwan

来源：

JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS | 2006年 / 22卷 / 03期

关键词：

random jitter; built-in self-test; jitter measurement;

D O I：

10.1007/s10836-006-8600-0

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we present a BIST technique that measures the RMS value of a Gaussian distribution period jitter. In the proposed approach, the signal under test is delayed by two different delay values and the probabilities it leads the two delayed signals are measured. The RMS jitter can then be derived from the probabilities and the delay values. Behavior and circuit simulations are performed to validate the proposed technique and analyze the design tradeoffs, and preliminary measurement results on FPGA are also presented.

引用

页码：219 / 228

页数：10

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