A Mixed Mode Background Calibration Technique for Pipeline ADCs

被引：0
|
作者：
Sobhi, Jafar [1 ]
Kanani, Ziaeddin Kuzeh [1 ]
Tahmasebi, Ahamad [2 ]
Yousefi, Mousa [2 ]
机构：
[1] Univ Tabriz, Dept Elect Engn, Tabriz, Iran
[2] Islamic Azad Univ, Sarab Branch, Sarab, Iran
来源：
ICIEA: 2009 4TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS, VOLS 1-6 | 2009年
关键词：
Analog-to-digital converter (ADC); pipeline; calibration; reference ADC; TO-DIGITAL CONVERTERS; A/D CONVERTER; CMOS; 15-B;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper describes a mixed mode background calibration technique for pipeline analog-to-digital converter (ADC). The proposed calibration scheme uses an insignificant, low-speed, low-power, high-resolution Sigma-Delta ADC to determine error in digital domain. The calibration technique calibrates capacitor mismatch as well as finite opamp dc gain, while the digital redundancy compensates for comparator offset.
引用
收藏
页码：2443 / +
页数：2
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