Carrier Transport and Stress Engineering in Advanced Nanoscale MOS Transistors

被引：3
|
作者：
Uchida, Ken [1 ]
Saitoh, Masumi [2 ]
机构：
[1] Tokyo Inst Technol, Grad Sch Engn, Dept Phys Elect, Meguro Ku, 2-12-1 Ookayama, Tokyo 1528552, Japan
[2] Toshiba Co Ltd, Res & Dev Ctr, Adv LSI Technol Lab, Tokyo, Japan
来源：
PROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS | 2009年
关键词：
D O I：
10.1109/VTSA.2009.5159267
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper reviews the carrier transport mechanisms and stress engineering in advanced nanoscale MOSFETs. First, carrier transport in bulk (100) and (110) MOSFETs is reviewed. Sub-band structure engineering to enhance mobility as well as ballistic current is also examined.
引用
收藏
页码：6 / +
页数：2
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