Toward a systematic sensitivity analysis of on-chip power grids using factor analysis

被引：1
|
作者：
Andersson, Daniel A. [1 ]
Svensson, Lars J. [1 ]
Larsson-Edefors, Per [1 ]
机构：
[1] Chalmers Univ Technol, Dept Comp Sci & Engn, SE-41296 Gothenburg, Sweden
来源：
2007 IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS | 2007年
关键词：
D O I：
10.1109/SPI.2007.4512237
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We present a systematic way of performing sensitivity analysis on on-chip power distribution grids. By using factor analysis we are able to uncover correlations between power grid design variables and power supply noise. From our analysis of 300 different grids in a 65-nm process, we can identify which power grid design variables have both high correlation to and high impact on noise; the most important one being supply rail width.
引用
收藏
页码：155 / 158
页数：4
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