Reconfigurable latch controllers for low power asynchronous circuits

被引:15
|
作者
Lewis, M [1 ]
Garside, J [1 ]
Brackenbury, L [1 ]
机构
[1] Univ Manchester, Dept Comp Sci, AMULET Grp, Manchester M13 9PL, Lancs, England
关键词
D O I
10.1109/ASYNC.1999.761520
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
A method for reducing the power consumption in asynchronous micropipeline-based circuits is presented. The method is based around a new design for latch controllers in which the operating mode of the pipeline latches (normally open/transparent or normally closed/opaque) can be selected according to the dynamic processing demand on the circuit. Operating in normally-closed mode prevents spurious transitions from propagating along a static pipeline, at the expense of reduced throughput. Tests of the new latch controller circuits on a pipelined multiplier datapath show that reductions in energy per operation of up to 32% can be obtained by changing to the normally-closed operating mode. Estimates suggest that in a typical application which exhibits a variable processing demand a power reduction of between 16- 24% is possible, with little or no impact on maximum throughput.
引用
收藏
页码:27 / 35
页数:9
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