FPGA-Based Software Profiler for Hardware/Software Co-design

被引:0
|
作者
Saad, El-Sayed M. [1 ]
Awadalla, Medhat H. A. [1 ]
El-Deen, Kareem Ezz [1 ]
机构
[1] Helwan Univ, Dept Commun Elect & Comp, Fac Engn, Cairo, Egypt
关键词
COSYNTHESIS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Embedded systems are a mixture of software running, on a microprocessor and application-specific hardware. Hardware/Software co-design requires an appropriate profiler to detect the functions that contribute to a large percentage of program execution. Software based profiling tools, such as the well-known GNU gprof profiler, integrates an extra code with the software program to be profiled causing a significant performance overhead. To address this issue, this paper proposes a software profiler called AddressTracer. This profiler is an adaptation of a non-intrusive, real time profiler called SnoopP. The AddressTracer is accurately able to evaluate the performance matrices of any specific software function. A software benchmark, Secure Hash Algorithm (SHA), is profiled using AddressTracer and other software profiling tools. Airwolf, and GNU software profiling tool (gprof), for a quantitative comparison and their performance overhead are studied. The achieved results show that AddressTracer provides accurate profiling results with no performance overhead. Airwolf causes a very low remarkable performance overhead compared with that incurred by gprof.
引用
收藏
页码:475 / 482
页数:8
相关论文
共 50 条
  • [21] Hardware/Software Co-design of 2D THz SAR Imaging for FPGA-based Systems-on-Chip
    Kamaleldin, Ahmed
    Aliagha, Ensieh
    Batra, Aman
    Wiemeler, Michael
    Kaiser, Thomas
    Goehringer, Diana
    2022 FIFTH INTERNATIONAL WORKSHOP ON MOBILE TERAHERTZ SYSTEMS (IWMTS), 2022,
  • [22] The Systematic Thinking Ability of Hardware/Software Co-design using FPGA
    Li, Ying
    Zhang, Jiong
    Mitra, Hritik
    Yu, Shicheng
    2020 IEEE FRONTIERS IN EDUCATION CONFERENCE (FIE 2020), 2020,
  • [23] Hardware/Software Co-Design of a Lightweight Crypto Algorithm BORON on an FPGA
    Acar, Burak
    Ors, Berna
    2017 10TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2017, : 1272 - 1276
  • [24] PipeFL: Hardware/Software co-Design of an FPGA Accelerator for Federated Learning
    Wang, Zixiao
    Che, Biyao
    Guo, Liang
    Du, Yang
    Chen, Ying
    Zhao, Jizhuang
    He, Wei
    IEEE ACCESS, 2022, 10 : 98649 - 98661
  • [25] Hardware/Software Co-Design of a Lightweight Crypto Algorithm BORON on an FPGA
    Acar, Burak
    Ors, Berna
    2017 10TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2017, : 1291 - 1295
  • [26] Hardware-Software Co-Design for Face Recognition on FPGA SoCs
    Wang, Hao
    Cao, Shan
    Xu, Shugong
    Zhang, Shunqing
    2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2020,
  • [27] Hardware/software co-design then and now
    Wirth, N
    INFORMATION PROCESSING LETTERS, 2003, 88 (1-2) : 83 - 87
  • [28] Hardware software co-design in Haskell
    Aronsson M.
    Sheeran M.
    1600, Association for Computing Machinery, 2 Penn Plaza, Suite 701, New York, NY 10121-0701, United States (52): : 162 - 173
  • [29] Hardware/software co-design for multimedia
    Wolf, W
    ADVANCED SIGNAL PROCESSING: ALGORITHMS, ARCHITECTURES, AND IMPLEMENTATIONS VII, 1997, 3162 : 510 - 517
  • [30] On the Co-Design of Quantum Software and Hardware
    Li, Gushu
    Wu, Anbang
    Shi, Yunong
    Javadi-Abhari, Ali
    Ding, Yufei
    Xie, Yuan
    PROCEEDINGS OF THE 8TH ACM INTERNATIONAL CONFERENCE ON NANOSCALE COMPUTING AND COMMUNICATION (ACM NANOCOM 2021), 2021,