Design of a configurable embedded processor architecture for DSP functions

被引：0
|
作者：
Yue, H [1 ]
Lai, MC [1 ]
Dai, K [1 ]
Wang, ZY [1 ]
机构：
[1] Natl Univ Def Technol, Sch Comp, Changsha 410073, Hunan, Peoples R China
来源：
11TH INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS WORKSHOPS, VOL II, PROCEEDINGS, | 2005年
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Most of the embedded applications are served today by general-purpose processors or special-purpose ASIC processors containing hundreds to thousands of ALUs. While such solutions are efficient, they lack flexibility and are not feasible for certain embedded applications. ASIP(Application Specific Instruction Processor) design methodology can not only satisfy the functionality and performance requirements of the embedded systems but also flexible. So it is widely adopted in embedded processor design domain. For the widely adopting of digital signal processing in the embedded applications, this paper studies a configurable VLIW processor architecture based oil TTA(Transport Triggered Architecture) for high performance digital signal processing in embedded systems. The methodology of ASIP design is applied and some handle optimizations are taken. It is shown that it has high performance to run the digital signal processing kernel applications, and its simplicity and flexibility encourages for further development with tuned functionality.
引用
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页码：27 / 31
页数：5
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