Impact of Process Variation in Inductive Integrated Voltage Regulator on Delay and Power of Digital Circuits

被引：9

作者：

Kar, Monodeep ^{[1
]}

Carlo, Sergio ^{[1
]}

Krishnamurthy, Harish ^{[2
]}

Mukhopadhyay, Saibal ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch ECE, Atlanta, GA 30332 USA

[2] Intel Corp, Hillsboro, OR 97124 USA

来源：

PROCEEDINGS OF THE 2014 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED) | 2014年

基金：

美国国家科学基金会;

关键词：

Integrated Voltage Regulator; Process Variation;

D O I：

10.1145/2627369.2627637

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper analyzes the effect of variations in the parameters of an Integrated Voltage Regulator (IVR) and its impact on the power/performance of a system of IVR driven digital logic circuit. The coupled analysis of IVR and digital logic considering variations in the integrated passives, power train FETs and controller transistors shows, compared to an off-chip VR, variations in IVR induce much larger shifts in the operating frequency of the logic and total system power. Variations in the output filter passives cause most prominent variations in the system power and performance, particularly pronounced at low voltage operation of the core. We also show that the mean performance of the system can be traded-off to reduce the variability by modifying IVR parameters, such as controller zeroes or output capacitors.

引用

页码：227 / 232

页数：6

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