Copper-filled through wafer vias with very low inductance

被引：5
|
作者：
Jenkins, KA [1 ]
Patel, CS [1 ]
机构：
[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
来源：
PROCEEDINGS OF THE IEEE 2005 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2005年
关键词：
D O I：
10.1109/IITC.2005.1499957
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The inductance of through-wafer vias in a new via technology in silicon is reported. The technology uses copper filled vias with 70 mu m diameters. Measurements by network analyzer up to 40 GHz show that the vias have inductance of approximately 0.15 pH/mu m, the smallest reported value for vias in silicon.
引用
收藏
页码：144 / 146
页数：3
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