Top-down logic design with pass-transistor cells and efficient synthesiser

被引：1

作者：

Hsiao, SF ^{[1
]}

Yeh, JS ^{[1
]}

机构：

[1] Natl Sun Yat Sen Univ, Inst Comp & Informat Engn, Kaohsiung 80424, Taiwan

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 12期

关键词：

D O I：

10.1049/el:19980880

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A pass-transistor based cell library containing only two types of cells is designed and a corresponding logic/circuit synthesiser developed for logic mapping of any combinational circuit. The proposed design has better performance than the recently proposed lean integration with pass transistors (LEAP) cell library. Furthermore, the modified LEAP cell library can be easily migrated to a new process technology due to the smaller number of cells.

引用

页码：1180 / 1182

页数：3

共 50 条

[21] Low power pass-transistor logic and application examples
Taki, K
Lee, BY
ELECTRONICS AND COMMUNICATIONS IN JAPAN PART III-FUNDAMENTAL ELECTRONIC SCIENCE, 1998, 81 (09): : 54 - 66
[22] Constructing testable differential pass-transistor logic circuits
Jaekel, A
CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING-REVUE CANADIENNE DE GENIE ELECTRIQUE ET INFORMATIQUE, 2002, 27 (02): : 83 - 87
[23] Area-oriented synthesis for Pass-Transistor Logic
Chaudhry, R
Liu, TH
Aziz, A
Burns, JL
INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1998, : 160 - 167
[24] Low power pass-transistor logic and application examples
Kobe Univ, Kobe, Japan
Electron Commun Jpn Part III Fundam Electron Sci, 9 (54-66):
[25] GAAS-MESFET DIFFERENTIAL PASS-TRANSISTOR LOGIC
PASTERNAK, JH
SALAMA, CAT
ELECTRONICS LETTERS, 1990, 26 (19) : 1597 - 1598
[26] Synthesis of high-speed pass-transistor logic
Oklobdzija, VG
Duchene, B
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1997, 44 (11): : 974 - 976
[27] A fast and area efficient complementary pass-transistor logic carry-skip adder
Strollo, AGM
Napoli, E
1997 21ST INTERNATIONAL CONFERENCE ON MICROELECTRONICS - PROCEEDINGS, VOLS 1 AND 2, 1997, : 701 - 704
[28] Design and evaluation for super low power Z80 with pass-transistor logic
Nagasawa, K
Taki, K
Tamemoto, H
Lee, BY
Tanaka, H
Imai, S
Kajikawa, Y
Azuma, D
SHARP TECHNICAL JOURNAL, 1997, (67): : 35 - 40
[29] Low power logic design using push-pull pass-transistor logics
Paik, WH
Ki, HJ
Kim, SW
INTERNATIONAL JOURNAL OF ELECTRONICS, 1998, 84 (05) : 467 - 478
[30] Energy-saving design technique achieved by latched pass-transistor adiabatic logic
Park, J
Hong, SJ
Kim, J
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 4693 - 4696

← 1 2 3 4 5 →