Top-down logic design with pass-transistor cells and efficient synthesiser

被引：1

作者：

Hsiao, SF ^{[1
]}

Yeh, JS ^{[1
]}

机构：

[1] Natl Sun Yat Sen Univ, Inst Comp & Informat Engn, Kaohsiung 80424, Taiwan

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 12期

关键词：

D O I：

10.1049/el:19980880

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A pass-transistor based cell library containing only two types of cells is designed and a corresponding logic/circuit synthesiser developed for logic mapping of any combinational circuit. The proposed design has better performance than the recently proposed lean integration with pass transistors (LEAP) cell library. Furthermore, the modified LEAP cell library can be easily migrated to a new process technology due to the smaller number of cells.

引用

页码：1180 / 1182

页数：3

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