Fundamental study on the error factor for sub 90 nm OPC modeling

被引:0
|
作者
Lee, Hyesung [1 ]
Lee, Sang-Uk [1 ]
Kim, Jeahee [1 ]
Kim, Keeho [1 ]
机构
[1] Gamgok Myeon, Sanwoo Ri, DongbuHitek, Eumseong Gun 369852, Chungbuk, South Korea
来源
PHOTOMASK TECHNOLOGY 2007, PTS 1-3 | 2007年 / 6730卷
关键词
model-based OPC; modeling error factor; accuracy; OPC runtime; optical modeling; resist modeling;
D O I
10.1117/12.746821
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In low-k1 imaging lithography process it is difficult to make the accurate OPC model not only because of factors caused by unstable process such as large CD (Critical Dimension) variation, large MEEF (Mask Error Enhancement Factor) and very poor process window but also because of potential error factors induced during OPC model fitting. In order to minimize those issues it is important to reduce the errors during OPC modeling. In this study, we have investigated the most influencing error factors in OPC modeling. At first, through comparing influence of optical parameters and illumination systems on OPC runtime and model accuracy, we observe main error factor. Secondly, in the case of resist modeling, OPC runtime and model accuracy were also analyzed by various model forms.
引用
收藏
页数:8
相关论文
共 50 条
  • [41] Sub-nH inductor modeling and design in 90-nm CMOS technology for millimeter-wave applications
    Hasani, Javad Yavand
    Kamarei, Mahmoud
    Ndagijimana, Fabien
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55 (06) : 517 - 521
  • [42] Study of leakage-induced photon emission processes in sub-90 nm CMOS devices
    Weizman, Y.
    Gurfinkel, M.
    Margulis, A.
    Fefer, Y.
    Shapira, Y.
    Baruch, E.
    SOLID-STATE ELECTRONICS, 2006, 50 (06) : 920 - 923
  • [43] Aerosol dynamics modeling of sub-500 nm particles during the HOMEChem study
    Patel, Sameer
    Rim, Donghyun
    Sankhyan, Sumit
    Novoselac, Atila
    Vance, Marina E.
    ENVIRONMENTAL SCIENCE-PROCESSES & IMPACTS, 2021, 23 (11) : 1706 - 1717
  • [44] Comparison study on mask error factor in 100nm ArF and KrF lithography
    Eom, TS
    Hyun, YS
    Kim, CK
    Bok, CK
    Shin, KS
    OPTICAL MICROLITHOGRAPHY XIV, PTS 1 AND 2, 2001, 4346 : 869 - 878
  • [45] Resist pattern collapse prevention for the sub-90nm node
    Kitano, J
    Honma, M
    MICROLITHOGRAPHY WORLD, 2004, 13 (02): : 18 - +
  • [46] Carbon hard masks for etching sub-90 nm structures
    Pears, KA
    Stavrev, M
    Scire, A
    Koepe, R
    Markert, M
    Egger, U
    Donohue, L
    MICROELECTRONIC ENGINEERING, 2005, 81 (01) : 156 - 161
  • [47] CoWBP capping barrier layer for sub 90 nm Cu interconnects
    Almog, R. Ofek
    Sverdlov, Y.
    Goldfarb, I.
    Shacham-Diamand, Y.
    MICROELECTRONIC ENGINEERING, 2007, 84 (11) : 2450 - 2454
  • [48] Design and CAD challenges in sub-90nm CMOS technologies
    Bernstein, K
    Chuang, CT
    Joshi, R
    Puri, R
    ICCAD-2003: IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2003, : 129 - 136
  • [49] Formation of extremely shallow junctions for sub-90 nm devices
    Walther, SR
    Mehta, S
    Jeong, U
    Lenoble, D
    SURFACE & COATINGS TECHNOLOGY, 2004, 186 (1-2): : 68 - 72
  • [50] Study of process contributions to total overlay error budget for sub-60-nm memory devices
    Shin, Jangho
    Kang, Hyunjae
    Choi, SungWon
    Woo, Seoukhoon
    Kim, Hochul
    Lee, SukJoo
    Lee, Junghyeon
    Kang, Chang-Jin
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2007, 25 (06): : 2444 - 2446