Comparison of Level Shifter Architectures: Application to I/O cell

被引：0
|
作者：
Petrica, Radu-Valentin [1 ,2 ]
Dobre, Mihaela-Daniela [1 ,2 ]
Coll, Philippe [1 ]
Draghici, Florin [2 ]
Brezeanu, Gheorghe [2 ]
机构：
[1] Microchip Technol Inc, Chandler, AZ USA
[2] Univ Politehn, Bucharest, Romania
来源：
CAS 2018 PROCEEDINGS: 2018 INTERNATIONAL SEMICONDUCTOR CONFERENCE | 2018年
关键词：
native devices; level shifter; I/O strucutre; low voltage;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Novel low-voltage and high-speed level shifter topologies will be presented. The level shifters circuits were designed in 40 nm technology using 1.2V devices and zero-VT transistors. These techniques will provide functionality near the threshold region. The simulated results were compared with a reference architecture. The resulted level shifters will be integrated in an already tested I/O structure. The results were analyzed in terms of electrical performance and silicon area.
引用
收藏
页码：209 / 212
页数：4
相关论文
共 50 条
  • [21] ZOID: I/O-Forwarding Infrastructure for Petascale Architectures
    Iskra, Kamil
    Romein, John W.
    Yoshii, Kazutomo
    Beckman, Pete
    PPOPP'08: PROCEEDINGS OF THE 2008 ACM SIGPLAN SYMPOSIUM ON PRINCIPLES AND PRACTICE OF PARALLEL PROGRAMMING, 2008, : 153 - 161
  • [22] I/O OVERHEAD AND PARALLEL VLSI ARCHITECTURES FOR LATTICE COMPUTATIONS
    NODINE, MH
    LOPRESTI, DP
    VITTER, JS
    IEEE TRANSACTIONS ON COMPUTERS, 1991, 40 (07) : 843 - 852
  • [23] Assessment of the I/O and Storage Subsystem in Modular Supercomputing Architectures
    Neuwirth, Sarah
    2022 IEEE INTERNATIONAL CONFERENCE ON CLUSTER COMPUTING (CLUSTER 2022), 2022, : 589 - 596
  • [24] I/O OVERHEAD AND PARALLEL VLSI ARCHITECTURES FOR LATTICE COMPUTATIONS
    NODINE, MH
    LOPRESTI, DP
    VITTER, JS
    LECTURE NOTES IN COMPUTER SCIENCE, 1990, 468 : 497 - 506
  • [25] Architectures for evaluating the quality of information models - A meta and an object level comparison
    Schuette, R
    CONCEPTUAL MODELING - ER'99, 1999, 1728 : 490 - 505
  • [26] Comparison of Different Repetitive Control Architectures: Synthesis and Comparison. Application to VSI Converters
    Ramos, German A.
    Costa-Castello, Ramon
    ELECTRONICS, 2018, 7 (12)
  • [27] Protecting Metadata Servers From Harm Through Application-level I/O Control
    Macedo, Ricardo
    Miranda, Mariana
    Tanimura, Yusuke
    Haga, Jason
    Ruhela, Amit
    Harrell, Stephen Lien
    Evans, Richard Todd
    Paulo, Joao
    2022 IEEE INTERNATIONAL CONFERENCE ON CLUSTER COMPUTING (CLUSTER 2022), 2022, : 573 - 580
  • [28] Parallel I/O Performance for Application-Level Checkpointing on the Blue Gene/P System
    Fu, Jing
    Min, Misun
    Latham, Robert
    Carothers, Christopher D.
    2011 IEEE INTERNATIONAL CONFERENCE ON CLUSTER COMPUTING (CLUSTER), 2011, : 465 - 473
  • [29] New architectures and I/O scheduling methods for scalable storage products
    Raskovic, D
    Milutinovic, V
    1997 INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS, PROCEEDINGS, 1997, : 14 - 19
  • [30] SPECIALIZED I/O COMPUTERS MAY FORESHADOW EVOLUTION OF SUPERMICRO ARCHITECTURES
    RAGUSKUS, AG
    COMPUTER DESIGN, 1988, 27 (02): : 66 - 67
12345