Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces

被引:4
|
作者
Sim, Hyeonuk [1 ]
Rahman, Atul [1 ]
Lee, Jongeun [1 ]
机构
[1] Ulsan Natl Inst Sci & Technol, Sch Elect & Comp Engn, Ulsan 44919, South Korea
基金
新加坡国家研究基金会;
关键词
Field-programmable gate array (FPGA); high level synthesis; loop coalescing; loop flattening; nested loop; triangular iteration space;
D O I
10.1109/TVLSI.2016.2520491
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Most existing solutions to pipelining nested loops are developed for general purpose processors, and may not work efficiently for field-programmable gate arrays due to loop control overhead. This is especially true when the nested loops have nonrectangular iteration spaces (IS). Thus we propose a novel method that can transform triangular IS-the most frequently found type of nonrectangular IS-into rectangular ones, so that other loop transformations can be effectively applied and the overall performance of nested loops can be maximized. Our evaluation results using the state-of-the-art Vivado high-level synthesis tool demonstrate that our technique can improve the performance of nested loops with nonrectangular IS significantly.
引用
收藏
页码:2799 / 2802
页数:4
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