Measurement of creep and relaxation behaviors of wafer-level CSP assembly using Moire interferometry

被引:10
|
作者
Ham, SJ [1 ]
Lee, SB [1 ]
机构
[1] Korea Adv Inst Sci & Technol, CARE Elect Packaging Lab, Dept Mech Engn, Taejon 305701, South Korea
关键词
D O I
10.1115/1.1571571
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper the creep and relaxation behaviors of a wafer-level CSP assembly under two types of thermal loading conditions were investigated using high sensitivity moire interferometry. One is a thermal load from 100degreesC to room temperature and the other is from room temperature to 100degreesC. In the second case, the real-time technique was used to monitor and measure the shear deformations of solder joints and the warpage of the assembly during the test. For the real-time measurements of thermal deformations, a small-sized thermal chamber having an optical window was developed. In addition, the test results obtained from the moire interferometry measurements were compared with the predicted values obtained from finite element analysis. It is shown that the deformation values predicted from finite element analysis have a good agreement with those obtained from the tests.
引用
收藏
页码:282 / 288
页数:7
相关论文
共 50 条
  • [21] Improvements of solder ball shear strength of a wafer-level CSP using a novel Cu stud technology
    Chang, KC
    Chiang, KN
    IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, 2004, 27 (02): : 373 - 382
  • [22] Wafer-level measurement of thermal conductivity on thin films
    Roncaglia, Alberto
    Mancarella, Fulvio
    Sanmartin, Michele
    Elmi, Ivan
    Cardinali, Gian Carlo
    Severi, Maurizio
    2006 IEEE SENSORS, VOLS 1-3, 2006, : 1239 - +
  • [23] High immunity wafer-level measurement of MHz current
    Dabek, M.
    Wisniowski, P.
    Kalabinski, P.
    Wrona, J.
    Cardoso, S.
    Freitas, P. P.
    MEASUREMENT, 2016, 94 : 474 - 479
  • [24] Q-factor definition and evaluation for spiral inductors fabricated using wafer-level CSP technology
    Aoki, Y
    Honjo, K
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2005, 53 (10) : 3178 - 3184
  • [25] Novel wafer-level CSP for stacked MEMS/IC dies with hermetic sealing
    Sugizaki, Yoshiaki
    Nakao, Mitsuhiro
    Higuchi, Kazuhito
    Miyagi, Takeshi
    Obata, Susumu
    Inoue, Michinobu
    Endo, Mitsuyoshi
    Shimooka, Yoshiaki
    Kojima, Akihiro
    Mori, Ikuo
    Shibata, Hideki
    58TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, PROCEEDINGS, 2008, : 811 - +
  • [26] Nano-level High Sensitivity Measurement Using Microscopic Moire Interferometry
    Joo, Jin-Won
    Kim, Han-Jun
    TRANSACTIONS OF THE KOREAN SOCIETY OF MECHANICAL ENGINEERS A, 2008, 32 (02) : 186 - 193
  • [27] Wafer-level assembly and sealing of a MEMS nanoreactor for in situ microscopy
    Mele, L.
    Santagata, F.
    Pandraud, G.
    Morana, B.
    Tichelaar, F. D.
    Creemer, J. F.
    Sarro, P. M.
    JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2010, 20 (08)
  • [28] MEMS Wafer-Level Packaging Technology Using LTCC Wafer
    Mohri, Mamoru
    Esashi, Masayoshi
    Tanaka, Shuji
    ELECTRONICS AND COMMUNICATIONS IN JAPAN, 2014, 97 (09) : 246 - U8
  • [29] COMPRESSIVE CREEP STRAIN-MEASUREMENTS USING MOIRE INTERFEROMETRY
    TUTTLE, ME
    KLEIN, RJ
    OPTICAL ENGINEERING, 1988, 27 (08) : 630 - 635
  • [30] Automated Wafer-Level Measurement of LDMOS Reverse Recovery Parameters
    Latorre, Jose A. Rodriguez
    Jimenez, Manuel A.
    Palomera, Rogelio
    2012 IEEE 55TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2012, : 1072 - 1075