A Programmable Hardware Accelerator for Simulating Dynamical Systems

被引:14
|
作者
Kung, Jaeha [1 ]
Long, Yun [1 ]
Kim, Duckhwan [1 ]
Mukhopadhyay, Saibal [1 ]
机构
[1] Georgia Inst Technol, Atlanta, GA 30332 USA
来源
44TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2017) | 2017年
关键词
Cellular nonlinear network; Dynamical systems; Hardware accelerator; Scientific simulation; CELLULAR NEURAL-NETWORKS; PATTERN-FORMATION; CNN; IMPLEMENTATION; CHIP;
D O I
10.1145/3079856.3080252
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The fast and energy - efficient simulation of dynamical systems defined by coupled ordinary/partial differential equations has emerged as an important problem. The accelerated simulation of coupled ODE/PDE is critical for analysis of physical systems as well as computing with dynamical systems. This paper presents a fast and programmable accelerator for simulating dynamical systems. The computing model of the proposed platform is based on multilayer cellular nonlinear network (CeNN) augmented with nonlinear function evaluation engines. The platform can be programmed to accelerate wide classes of ODEs/PDEs by modulating the connectivity within the multilayer CeNN engine. An innovative hardware architecture including data reuse, memory hierarchy, and near - memory processing is designed to accelerate the augmented multilayer CeNN. A dataflow model is presented which is supported by optimized memory hierarchy for efficient function evaluation. The proposed solver is designed and synthesized in 15nm technology for the hardware analysis. The performance is evaluated and compared to GPU nodes when solving wide classes of differential equations and the power consumption is analyzed to show orders of magnitude improvement in energy efficiency.
引用
收藏
页码:403 / 415
页数:13
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