AN FPGA HARDWARE/SOFTWARE CO-DESIGN TOWARDS EVOLVABLE SPIKING NEURAL NETWORKS FOR ROBOTICS APPLICATION

被引:17
|
作者
Johnston, S. P. [1 ]
Prasad, G. [1 ]
Maguire, L. [1 ]
Mcginnity, T. M. [1 ]
机构
[1] Univ Ulster, Sch Comp & Intelligent Syst, Intelligent Syst Res Ctr, Derry BT47 7JL, North Ireland
关键词
FPGA; ESNN; hardware/software co-design; TIMING-DEPENDENT PLASTICITY; LEARNING ALGORITHMS; IMPLEMENTATION;
D O I
10.1142/S0129065710002541
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper presents an approach that permits the effective hardware realization of a novel Evolvable Spiking Neural Network (ESNN) paradigm on Field Programmable Gate Arrays (FPGAs). The ESNN possesses a hybrid learning algorithm that consists of a Spike Timing Dependent Plasticity (STDP) mechanism fused with a Genetic Algorithm (GA). The design and implementation direction utilizes the latest advancements in FPGA technology to provide a partitioned hardware/software co-design solution. The approach achieves the maximum FPGA flexibility obtainable for the ESNN paradigm. The algorithm was applied as an embedded intelligent system robotic controller to solve an autonomous navigation and obstacle avoidance problem.
引用
收藏
页码:447 / 461
页数:15
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