A 1-V 5-GHz CMOS multiple magnetic feedback receiver front-end

被引:3
|
作者
Vitzilaios, Georgios [1 ]
Papananos, Yannis [1 ]
Theodoratos, Gerasimos [1 ]
机构
[1] Natl Tech Univ Athens, Dept Elect & Elect Engn, GR-15773 Athens, Greece
关键词
CMOS analog circuits; linearization techniques; low-noise amplifier (LNA); mixer design; receiver topology;
D O I
10.1109/TMTT.2008.921752
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a receiver front-end module operating at 5 GHz and suitable for low-voltage operation is presented. The design consists of a single amplifying transistor low-noise amplifier topology that utilizes multiple magnetic feedback in order to simultaneously achieve high gain and high reverse isolation. In addition, a mixer topology for. optimum performance regarding gain, noise, and linearity under low-voltage operation is presented. The design has been fabricated in IBM's 0.13-mu m CMOS technology, and the measured performance indicates a receiver conversion gain of 22.3 dB, a noise figure of 2.64 dB, and a third-order input intercept point of +0.1 dBm.
引用
收藏
页码:1338 / 1348
页数:11
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