Reliable Power Efficient Systems through Run-time Reconfiguration

被引:0
|
作者
El-Araby, Nahla [1 ,2 ]
Jantsch, Axel [1 ]
机构
[1] TU Wien, Vienna, Austria
[2] Canadian Int Coll CIC, Cairo, Egypt
关键词
FPGA; Reliability; Power; Run time optimization; RELIABILITY;
D O I
10.1109/NEWCAS52662.2022.9841986
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
We propose a methodology for optimizing the reliability, power, area, and performance of Field Programmable Gate Array (FPGA)-based systems at run time based on dynamic reconfiguration. A partial reconfiguration manager is designed to switch between different versions of the design according to real operating conditions. Reliability, Power, area, and performance are factors used for selecting the design version to be configured. Power and Reliability conditions are assessed through monitoring the system power state and the environment radiations with a radiation sensor, respectively. The experimental results show 40% reduction in power consumption while keeping an average reliability of 99.5%.
引用
收藏
页码:347 / 351
页数:5
相关论文
共 50 条
  • [21] A segmentation model for partial run-time reconfiguration
    Taher, Mohamed
    El-Ghazawi, Tarek
    2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2006, : 745 - 748
  • [22] Energy Reduction with Run-Time Partial Reconfiguration
    Liu, Shaoshan
    Pittman, Richard Neil
    Forin, Alessandro
    FPGA 10, 2010, : 292 - 292
  • [23] A run-time reconfiguration algorithm for VLSI arrays
    Wu, JG
    Thambipillai, S
    16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, : 567 - 572
  • [24] Colt: An experiment in wormhole run-time reconfiguration
    Bittner, RA
    Athanas, PM
    Musgrove, MD
    HIGH-SPEED COMPUTING, DIGITAL SIGNAL PROCESSING, AND FILTERING USING RECONFIGURABLE LOGIC, 1996, 2914 : 187 - 194
  • [25] On dynamic run-time processor pipeline reconfiguration
    Tradowsky, Carsten
    Thoma, Florian
    Huebner, Michael
    Becker, Juergen
    2012 IEEE 26TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS & PHD FORUM (IPDPSW), 2012, : 419 - 424
  • [26] Run-Time Reconfiguration of Processing Elements through Soft-Core Processor
    Nithya, R.
    Chandran, K. R. Sarath
    Chandramani, V. Premanand
    2014 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP), 2014,
  • [27] A Reliable, Safe, and Secure Run-Time Platform for Cyber Physical Systems
    Lim, Sung-Soo
    Im, Eun-Jin
    Dutt, Nikil
    Lee, Kyung Woo
    Shin, Insik
    Lee, Chang-Gun
    Lee, Insup
    2013 IEEE SIXTH INTERNATIONAL CONFERENCE ON SERVICE-ORIENTED COMPUTING AND APPLICATIONS (SOCA), 2013, : 268 - 274
  • [28] Plato: a genetic algorithm approach to run-time reconfiguration in autonomic computing systems
    Andres J. Ramirez
    David B. Knoester
    Betty H. C. Cheng
    Philip K. McKinley
    Cluster Computing, 2011, 14 : 229 - 244
  • [29] Prediction Based Run-Time Reconfiguration on Many-core Embedded Systems
    Li, Zheng
    He, Shuibing
    Wang, Li
    2017 IEEE INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE AND ENGINEERING (CSE) AND IEEE/IFIP INTERNATIONAL CONFERENCE ON EMBEDDED AND UBIQUITOUS COMPUTING (EUC), VOL 2, 2017, : 140 - 146
  • [30] Plato: a genetic algorithm approach to run-time reconfiguration in autonomic computing systems
    Ramirez, Andres J.
    Knoester, David B.
    Cheng, Betty H. C.
    McKinley, Philip K.
    CLUSTER COMPUTING-THE JOURNAL OF NETWORKS SOFTWARE TOOLS AND APPLICATIONS, 2011, 14 (03): : 229 - 244