A 5-GHz direct-conversion receiver with I/Q phase and gain error calibration

被引:0
|
作者
Chen, WZ [1 ]
Lee, TL [1 ]
Lu, TY [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Innovat Package Res Ctr, Integrated Circuits & Syst Lab, Hsinchu 300, Taiwan
来源
2005 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS | 2005年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the design of a 5GHz direct conversion receiver with phase and gain errors calibration for WLAN application. Integrated both LNA and mixer in a single chip, the conversion gain of the RF receiver is switch-able to compromise between linearity and noise performance. In addition, calibration schemes are proposed to compensate gain and phase errors in the I/Q signal paths. By means of this technique, the measured phase error is reduced to be less than 0.6 degrees and gain error less than 0.2 dB. The receiver provides a conversion gain of 28.2 dB in the high gain mode and 11.6 dB in the low gain mode within the signal bandwidth. The overall noise figure is 6.4dB in the high gain mode, and the third-order input intercept point (IIP3) is about -6.8dBm in the low gain mode. Implemented in a 0.18-mu m CMOS technology, it consumes 37.4 mW from a 1.8 V supply. Chip area is 1.64 mm(2).
引用
收藏
页码:201 / 204
页数:4
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