Clocking scheme for switched-capacitor circuits

被引：0
|
作者：
Steensgaard, J [1 ]
机构：
[1] Oregon State Univ, ECE Dept, Corvallis, OR 97331 USA
来源：
ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6 | 1998年
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them, are discussed.
引用
收藏
页码：488 / 491
页数：4
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