Real-time Dense Stereo Matching Architecture for High-resolution Image

被引:0
|
作者
Lee, Seonyoung [1 ]
Son, Haengson [1 ]
Min, Kyoungwon [1 ]
机构
[1] Korea Elect Technol Inst, Dept SoC Platform Res Ctr, Songnam, South Korea
关键词
component; stereo matching; hardware architecture; real-time;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper we propose a real-time dense stereo matching architecture for a high-resolution image. Stereo matching shows the best performance to detect objects and to estimate distance detection. So, many algorithms have been developed, such as local matching and global matching. Disparity estimation algorithm should run at real-time to be of practical use for applications such as autonomous driving. However, they generally require large computational efforts and high memory capacities. To solve this problem, we adopt the ELAS algorithm and implemented in hardware for the real-time operation. Our architecture was implemented using Verilog HDL. Our circuit is composed of 770,305 logic gates and 3,638,016 bits internal memory. Also, our hardware architecture can extract the disparity map for the images which receive from cameras without delay in real time.
引用
收藏
页码:299 / 300
页数:2
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