Dynamic Parallel Computing Architecture for Video Processing

被引：0
|
作者：
Bharanitharan, K. [1 ]
Paul, Anand [2 ]
Jiang, Yung-Chuan [3 ]
Wang, Jhing-Fa [3 ]
机构：
[1] Korea Univ, Dept Elect Engn, Seoul, South Korea
[2] Hanyang Univ, Dept Elect Engn, Seoul, South Korea
[3] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan
来源：
JOURNAL OF INTERNET TECHNOLOGY | 2010年 / 11卷 / 06期
关键词：
Motion estimation; Video coding; Parallel processing; Parallel architecture; FPGA; SPACE EXPLORATION;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, motion estimation preprocessing algorithm is mapped onto a new dynamically parallel computing architecture, namely, the parallel computing architecture, which consists of multiple parallel units It eventually reduces the computation required for motion estimation in advance video coding A directed acyclic graph is constructed to represent the video coding algorithms comprising motion estimation This speeds up the video processing with minimum sacrifice
引用
收藏
页码：867 / 873
页数：7
相关论文
共 50 条
  • [41] THE SCIENCE OF COMPUTING - THE EVOLUTION OF PARALLEL PROCESSING
    DENNING, PJ
    AMERICAN SCIENTIST, 1985, 73 (05) : 414 - &
  • [42] PARALLEL PROCESSING USHERS IN A REVOLUTION IN COMPUTING
    GALLANT, J
    EDN, 1988, 33 (18) : 86 - &
  • [43] Parallel computing for genome sequence processing
    Zou, You
    Zhu, Yuejie
    Li, Yaohang
    Wu, Fang-Xiang
    Wang, Jianxin
    BRIEFINGS IN BIOINFORMATICS, 2021, 22 (05)
  • [44] PARALLEL COMPUTING IN THE PROCESSING OF QUATERNION SIGNALS
    Rozhentsov, A. A.
    Baev, A. A.
    DISTRIBUTED COMPUTING AND GRID-TECHNOLOGIES IN SCIENCE AND EDUCATION, 2010, : 399 - 405
  • [45] Data Processing Algorithm for Parallel Computing
    Barabanov, Igor
    Barabanova, Elizaveta
    Maltseva, Natalia
    Kvyatkovskaya, Irina
    KNOWLEDGE-BASED SOFTWARE ENGINEERING, JCKBSE 2014, 2014, 466 : 61 - 69
  • [46] New multi-DSP parallel computing architecture for real-time image processing
    Hu Junhong
    Journal of Systems Engineering and Electronics, 2006, (04) : 883 - 889
  • [47] IVP: An Intelligent Video Processing Architecture for Video Streaming
    Gao, Chengsi
    Wang, Ying
    Han, Yinhe
    Chen, Weiwei
    Zhang, Lei
    IEEE TRANSACTIONS ON COMPUTERS, 2023, 72 (01) : 264 - 277
  • [48] A Framework for Heuristic Scheduling for Parallel Processing on Multicore Architecture: A Case Study with Multiview Video Coding
    Pang, Yi
    Sun, Lifeng
    Wen, Jiangtao
    Zhang, Fengyan
    Hu, Weidong
    Feng, Wei
    Yang, Shiqiang
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 2009, 19 (11) : 1658 - 1666
  • [49] GRAND ALLIANCE MPEG-2-BASED VIDEO DECODER WITH PARALLEL-PROCESSING ARCHITECTURE
    CHALLAPALI, K
    CAVALLERANO, A
    SHEN, R
    AKIWUMIASSANI, O
    CUGNINI, A
    BASILE, C
    INTERNATIONAL JOURNAL OF IMAGING SYSTEMS AND TECHNOLOGY, 1994, 5 (04) : 263 - 267
  • [50] PROGRAMMABLE PARALLEL PROCESSOR FOR VIDEO PROCESSING
    NISHITANI, T
    TAMITANI, I
    HARASAKI, H
    IEEE INTERNATIONAL CONFERENCE ON SYSTEMS ENGINEERING ///, 1989, : 169 - 172
12345