共 50 条
- [1] Clock Distribution Methodology for PowerPC™ Microprocessors Journal of VLSI signal processing systems for signal, image and video technology, 1997, 16 : 181 - 189
- [2] Clock distribution methodology for PowerPC(TM) microprocessors JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1997, 16 (2-3): : 181 - 189
- [3] FEASIBILITY STUDY FOR COMMUNICATION OVER POWER DISTRIBUTION NETWORKS OF MICROPROCESSORS 2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC), 2011, : 118 - 121
- [4] A scalable resistor-less PLL design for PowerPC(TM) microprocessors INTERNATIONAL CONFERENCE ON COMPUTER DESIGN - VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1996, : 293 - 300
- [5] Design oriented analysis of package power distribution system considering target impedance for high performance microprocessors ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2001, : 273 - 276
- [6] Establishing latch correspondence for embedded circuits of PowerPC® microprocessors HLDVT'05: TENTH ANNUAL IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS, 2005, : 37 - 44
- [7] A CMOS temperature sensor for PowerPC(TM)RISC microprocessors 1997 SYMPOSIUM ON VLSI CIRCUITS: DIGEST OF TECHNICAL PAPERS, 1997, : 13 - 14
- [9] Design and validation of a performance and power simulator for PowerPC systems Shafi, H. (hshafi@us.ibm.com), 1600, IBM Corporation (47): : 5 - 6
- [10] Divide and conquer approach to functional verification of PowerPC(TM) microprocessors 8TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS: SHORTENING THE PATH FROM SPECIFICATION TO PROTOTYPE, 1997, : 128 - 133