共 50 条
- [42] Open computation tree logic for formal verification of modules ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2002, : 735 - 740
- [44] New Formal Verification Method Based on A Trace Logic 2008 INTERNATIONAL WORKSHOP ON INFORMATION TECHNOLOGY AND SECURITY, 2008, : 9 - 11
- [45] A dynamic logic for the formal verification of java card programs Lect. Notes Comput. Sci., 1600, (6-24):
- [47] An intuitionistic modal logic with applications to the formal verification of hardware COMPUTER SCIENCE LOGIC, 1995, 933 : 354 - 368
- [49] An Applied Quantum Hoare Logic PROCEEDINGS OF THE 40TH ACM SIGPLAN CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION (PLDI '19), 2019, : 1149 - 1162
- [50] Matching Logic: An Alternative to Hoare/Floyd Logic ALGEBRAIC METHODOLOGY AND SOFTWARE TECHNOLOGY, 2011, 6486 : 142 - +