共 50 条
- [1] Challenges of Cu Wire Bonding on Low-k/Cu Wafers with BOA Structures 2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 342 - 349
- [2] Computational Modeling and Optimization for Wire Bonding Process on Cu/Low-K Wafers 2009 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2009), 2009, : 268 - 276
- [4] Low-K wire bonding 56TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE 2006, VOL 1 AND 2, PROCEEDINGS, 2006, : 1616 - +
- [5] Direct Au and Cu wire bonding on Cu/Low-k BEOL PROCEEDINGS OF THE 4TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC 2002), 2002, : 344 - 349
- [6] Modeling and characterization of Cu wire bonding process on silicon chip with 45nm node and Cu/low-k structures PROCEEDINGS OF THE 2013 IEEE 15TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC 2013), 2013, : 270 - 275
- [10] Gold wire bonding on low-K material - A new challenge for interconnection technology 29TH INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 2004, : 13 - 17