Study on the ESD-Induced Gate-Oxide Breakdown and the Protection Solution in 28nm High-K Metal-Gate CMOS Technology

被引：0

作者：

Lin, Chun-Yu ^{[1
]}

Ker, Ming-Dou ^{[2
]}

Chang, Pin-Hsin ^{[2
]}

Wang, Wen-Tai ^{[3
]}

机构：

[1] Natl Taiwan Normal Univ, Dept Elect Engn, Taipei, Taiwan

[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30050, Taiwan

[3] Global Unichip Corp, Hsinchu, Taiwan

来源：

2015 IEEE NANOTECHNOLOGY MATERIALS AND DEVICES CONFERENCE (NMDC) | 2015年

关键词：

CMOS; electrostatic discharge (ESD); high-k metal-gate (HKMG); silicon-controlled rectifier (SCR);

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

To protect the IC chips against the electrostatic discharge (ESD) damages in 28nm high-k metal-gate (HKMG) CMOS technology, the ESD protection consideration was studied in this work. The ESD design window was found to be within 1V and 5.1V in 28nm HKMG CMOS technology. An ESD protection device of PMOS with embedded silicon-controlled rectifier (SCR) was investigated to be suitable for ESD protection in such narrow ESD design window.

引用

页数：4

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