Conjugate distributed arithmetic adaptive FIR filters and their hardware implementation

Adaptive filtering constitutes an important class of DSP algorithms employed in several hand held mobile devices for applications such as echo cancellation, signal de-noising, and channel equalization. In this paper, a new hardware architecture using conjugate distributed arithmetic (CDA) which is suitable for high throughput hardware implementations of LMS adaptive filters is presented. Unlike a traditional distributed arithmetic (DA) implementation where all possible combination sums of the filter coefficients are stored in a look-up-table (LUT), in the CDA architecture, all possible combination sums of the input signal samples are stored in the LUT and updated at the arrival of every sample using an efficient update procedure. We describe the design of CDA adaptive filters and show that practical implementations of CDA adaptive filters have very high throughput relative to multiply and accumulate architectures. We also show that CDA adaptive filters have a potential area and power consumption advantage over DSP microprocessor architectures for a given throughput.