A code generation algorithm of crosstalk-avoidance code with memory for low-power on-chip bus

被引：0
|
作者：
Cheng, Kuang-Chin [1 ]
Jou, Jing-Yang [1 ]
机构：
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan
来源：
2008 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM | 2008年
关键词：
D O I：
10.1109/VDAT.2008.4542440
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a bus encoding approach including related code generation algorithm for global data busses is developed to produce area-efficient crosstalk-avoidance (CA) codes with considering low-power requirements. Proposed codes are codes with memory using overlapping boundary strategy. The probabilistic distribution of input data could be included to reduce the power consumption. The performance improvement of CA codes is nearly 2x for heavily coupled busses based on theoretical analysis. As compared to uncoded datawords, proposed codes show 12% to 38% energy-reduction on bus for an equi-probable 32-bit bus design.
引用
收藏
页码：172 / 175
页数：4
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