Power and Signal Integrity Analysis of High-speed Mixed-signal Backplane Based on VPX

被引：0
|
作者：
Meng Hua [1 ]
Niu Minxi [1 ]
Tan Anju [1 ]
Miao Jianghong [1 ]
机构：
[1] China Acad Engn Phys, Inst Elect Engn, Mianyang 621900, Sichuan, Peoples R China
来源：
2018 IEEE SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SIGNAL INTEGRITY AND POWER INTEGRITY (EMC, SI & PI) | 2018年
关键词：
Power Integrity; simultaneous Switching Noise (SSN); Electromagnetic Band gap (EBG); Signal Integrity; SIMULTANEOUS SWITCHING NOISE; BAND SUPPRESSION; EMI REDUCTION; PLANE; MITIGATION;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, the problem of simultaneous switching noise (SSN) in the design of high-speed mixed-signal backplane is analyzed from the aspect of power integrity. How to suppress SSN of high-speed mixed-signal backplane becomes an important research direction at present. Based on the analysis of the traditional decoupling capacitor noise reduction method and the latest noise reduction principle of the electromagnetic band gap (EBG) structures, a novel type of EBG structures is proposed to suppress the noise on the printed circuit board (PCB). The simulation and measurement results show that the noise isolation depth reaches -40dB in the frequency band from 0.4 to 20GHz, which achieves the effect of ultra-wideband high isolation and meets the power and signal integrity requirements of high-speed mixed-signal backplane based on VPX(VITA 46). It provides an experimental reference for the application of the EBG structure on other high-speed mixed-signal backplane and other projects.
引用
收藏
页码：577 / 581
页数：5
相关论文
共 50 条
  • [41] Ensuring Signal and Power Integrity for High-Speed Digital Systems An EMC Perspective
    Schuster, Christian
    2015 IEEE 5TH INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - BERLIN (ICCE-BERLIN), 2015, : 205 - 207
  • [42] Power and signal integrity improvement in ultra high-speed current mode logic
    Ha, H
    Brewer, F
    ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 525 - 528
  • [43] Signal Integrity Characterization of High-Speed DDR Interface
    Kato, Takuya
    Yamamoto, Shintaro
    Sudo, Toshio
    Ono, Yasushi
    Takahashi, Eiji
    Yamada, Toru
    2011 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS), 2011,
  • [44] CLOCK AND SIGNAL INTEGRITY FOR TESTING HIGH-SPEED ADCS
    Okawara, Hideo
    ELECTRONICS WORLD, 2011, 117 (1908): : 14 - 17
  • [45] High-Speed Signal Integrity Design for HDCA Systems
    Kwon, Wonok
    Kim, Young Woo
    2018 INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGY CONVERGENCE (ICTC), 2018, : 1267 - 1269
  • [46] Fast signal separation circuit for a high-speed signal integrity test system
    Nastase, AS
    Nelson, RL
    CAS: 2002 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2001, : 377 - 380
  • [47] Analysis of Power Supply And Signal Integrity of High Speed PCB Board
    Liu, Jin
    Zhang, Min
    Hu, Gang
    PROCEEDINGS OF 2019 IEEE 8TH JOINT INTERNATIONAL INFORMATION TECHNOLOGY AND ARTIFICIAL INTELLIGENCE CONFERENCE (ITAIC 2019), 2019, : 412 - 416
  • [48] A Novel Fractal PCB Power Plane for Power Integrity in High Speed Mixed Signal System
    Huang, HuiFen
    Chu, QingXin
    Xie, ZeMing
    Xiao, JianKang
    APMC: 2009 ASIA PACIFIC MICROWAVE CONFERENCE, VOLS 1-5, 2009, : 661 - +
  • [49] HIGH-SPEED LIGHTWAVE SIGNAL ANALYSIS
    MILLER, CM
    HEWLETT-PACKARD JOURNAL, 1990, 41 (01): : 80 - 91
  • [50] High-Speed Channel Modeling with Deep Neural Network for Signal Integrity Analysis
    Lu, Tianjian
    Wu, Ken
    Yang, Zhiping
    Sun, Ju
    2017 IEEE 26TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2017,
12345