Digital Data Convertion Using Content Addressable Memory

被引：0

作者：

Kokosinski, Zbigniew ^{[1
]}

机构：

[1] Cracow Univ Technol, Ul Warszawska 24, PL-31155 Krakow, Poland

来源：

PROCEEDINGS OF THE 2019 10TH IEEE INTERNATIONAL CONFERENCE ON INTELLIGENT DATA ACQUISITION AND ADVANCED COMPUTING SYSTEMS - TECHNOLOGY AND APPLICATIONS (IDAACS), VOL. 2 | 2019年

关键词：

CAM; combinational circuit; data convertion; DRMAX-DC algorithm; mask generator; Minimum Base Problem; SEARCH;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In this paper a novel digital data conversion scheme is proposed that may be applied in analog or digital data acquisition systems. In this scheme possible input redundancy of combinational logic circuit is eliminated by argument reduction. CAM (associative memory) is used in two implementations - for binary and ternary logic, respectively. For binary CAM hardware generators of column masks may be applied. The resulting digital structure can be easily implemented in FPGA.

引用

页码：680 / 684

页数：5

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