Ultra-Low Power Subthreshold Quasi Floating Gate CMOS Logic Family for Energy Harvesting

被引：0
|
作者：
Pilar Garde, M. [1 ]
Lopez-Martin, Antonio [1 ]
Orradre, Daniel [1 ]
Ramirez-Angulo, Jaime [2 ]
机构：
[1] Univ Publ Navarra, Inst Smart Cities, Pamplona, Spain
[2] New Mexico State Univ, Klipsch Sch Elect & Comp Engn, Las Cruces, NM 88003 USA
来源：
2018 28TH INTERNATIONAL SYMPOSIUM ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS) | 2018年
关键词：
Ultra Low Voltage Design; Quasi-Floating Gate Transistor; CMOS Digital Logic;
D O I：
暂无
中图分类号：
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号：
0807 ; 0820 ;
摘要：
Subthreshold digital circuits are suitable for application niches where high performance is not required, but extremely low power consumption is a must. One of the most relevant applications of this kind nowadays is energy harvesting, where self-powered devices experience severe energy constraints. In this paper, a subthreshold CMOS logic family is proposed based on the Quasi-Floating Gate transistor, aimed to the design of different subcircuits required in energy harvesting. Measurement results of a test chip prototype confirm the feasibility of this approach.
引用
收藏
页码：118 / 122
页数：5
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