A 0.18-μm Dual-Gate CMOS Device Modeling and Applications for RF Cascode Circuits

被引：9

作者：

Chang, Hong-Yeh ^{[1
]}

Liang, Kung-Hao ^{[1
]}

机构：

[1] Natl Cent Univ, Dept Elect Engn, Jhongli 32001, Taoyuan, Taiwan

来源：

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES | 2011年 / 59卷 / 01期

关键词：

BSIM; CMOS; dual gate; low-noise amplifier (LNA); mixer; modeling; LOW-POWER; P-MOSFET; NOISE; GHZ; MIXER; EXTRACTION; DESIGN;

D O I：

10.1109/TMTT.2010.2091201

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A merged-diffusion dual-gate CMOS device model is presented in this paper. The proposed large-signal model consists of two intrinsic BSIM3v3 nonlinear models and parasitic components. The parasitic elements, including the substrate networks, the distributed resistances, and the inductances, are extracted from the measured S-parameters. In order to verify the model accuracy, a cascode configuration with the proposed dual-gate device is employed in a low-noise amplifier. The dual-gate model is also evaluated with power sweep and load-pull measurements. In addition, a doubly balanced dual-gate mixer is successfully demonstrated using the proposed model. The measured results agree with the simulated results using the proposed device model for both linear and nonlinear applications. The advanced large-signal dual-gate CMOS model can be further used as an RF sub-circuit cell for simplifying the design procedure.

引用

页码：116 / 124

页数：9

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