A novel P-channel nitride-trapping nonvolatile memory device with excellent reliability properties

被引：3

作者：

Lue, HT ^{[1
]}

Hsieh, KY ^{[1
]}

Liu, R ^{[1
]}

Lu, CY ^{[1
]}

机构：

[1] Macronix Int Co Ltd, Emerging Cent Lab, Hsinchu 300, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2005年 / 26卷 / 08期

关键词：

band-to-band tunneling induced hot-electron (BTBTHE); NROM; nitride trapping; P-channel; SONOS;

D O I：

10.1109/LED.2005.852742

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel P-channel nitride trapping nonvolatile memory device is studied. The device uses a P+-poly gate to reduce gate injection during channel erase, and a relatively thick tunnel oxide (> 5 nm) to prevent charge loss. The programming is carried out by low-power band-to-band tunneling induced hot-electron (BTBTHE) injection. For the erase, self-convergent channel erase is used to expel the electrons out of nitride. Experimental results show that this p-channel device is immune to read disturb due to the large potential barrier for hole tunneling. Excellent P/E cycling endurance and retention properties are demonstrated. This p-channel device shows potential for high-density NAND-type array application with high-programming throughput (> 10 Mb/sec).

引用

页码：583 / 585

页数：3

共 50 条

[31] Novel operation schemes to improve device reliability in a localized trapping storage SONOS-type flash memory
Yeh, CC
Tsai, WJ
Lu, TC
Chen, HY
Lai, HC
Zous, NK
Liao, YY
You, GD
Cho, SK
Liu, CC
Hsu, FS
Huang, LT
Chiang, WS
Liu, CJ
Cheng, CF
Chou, MH
Chen, CH
Wang, TH
Ting, WC
Pan, S
Ku, J
Lu, CY
2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, 2003, : 173 - 176
[32] Novel self-limiting program scheme utilizing N-channel select transistors in P-channel DINOR flash memory
Ohnakado, T
Takada, H
Hayashi, K
Sugahara, K
Satoh, S
Abe, H
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, : 181 - 184
[33] Reliability and defectivity comparison of n- and p-channel SLS ELA polysilicon TFTs fabricated with a novel crystallization technique
Moschou, D. C.
Exarchos, M. A.
Kouvatsos, D. N.
Papaioannou, G. J.
Arapoyanni, A.
Voutsas, A. T.
MICROELECTRONICS RELIABILITY, 2008, 48 (8-9) : 1544 - 1548
[34] Two-dimensional self-consistent simulation of a triangular P-channel SOI nano-flash memory device
Tang, XH
Baie, X
Colinge, JP
Gustin, C
Bayot, V
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (08) : 1420 - 1426
[35] Memory properties of oxide-nitride-oxynitride stack structure using ultra-thin oxynitrided film as tunneling layer for nonvolatile memory device on glass
Jung, Sungwook
Hwang, Sunghyun
Yi, J.
THIN SOLID FILMS, 2008, 517 (01) : 362 - 364
[36] Device performance and reliability of p-channel metal-oxide-semiconductor field effect transistors with chemical-vapor-deposited gate oxides
Ahn, JH
Kwong, DL
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1997, 36 (7A): : 4225 - 4229
[37] A novel 2 T P-channel nano-crystal memory for low power/high speed embedded NVM applications
张君宇
王永
刘璟
张满红
许中广
霍宗亮
刘明
半导体学报, 2012, 33 (08) : 67 - 70
[38] Novel self-limiting high-speed program scheme of p-channel DINOR flash memory with n-channel select transistors
Ohnakado, T
Satoh, S
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (06) : 1209 - 1213
[39] A novel 2 T P-channel nano- crystal memory for low power/high speed embedded NVM applications
Zhang Junyu
Wang Yong
Liu Jing
Zhang Manhong
Xu Zhongguang
Huo Zongliang
Liu Ming
JOURNAL OF SEMICONDUCTORS, 2012, 33 (08)
[40] Enhanced operation and retention characteristics in charge-trapping flash memory device with a novel Si/Ge super-lattice channel
Liu, Li-Jung
Chang-Liao, Kuei-Shu
Jian, Yi-Chuen
Wang, Tien-Ko
MICROELECTRONIC ENGINEERING, 2011, 88 (07) : 1159 - 1163

← 1 2 3 4 5 →