Characterization of charging damage in high power implants using SPIDER wafers

被引：0
|
作者：
Singh, B [1 ]
Elkind, A [1 ]
Mack, M [1 ]
Ameen, M [1 ]
Marshall, D [1 ]
Ring, P [1 ]
Krull, W [1 ]
机构：
[1] Motorola MOS12, Chandler, AZ USA
来源：
2000 INTERNATIONAL CONFERENCE ON ION IMPLANTATION TECHNOLOGY, PROCEEDINGS | 2000年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A detailed investigation of charging induced damage due to high power implants was done using SEMATECH SPIDER wafers with sub-50 Angstrom gate oxide thickness. The SPIDER wafers have an active area to gate antenna ratio of up to 1:90K, which enables a high sensitivity for charging related damage. Threshold voltage (V-t) and gate leakage current (I-g) shifts for both n- and p-type devices have been examined as a response to plasma electron flood (PEF) conditions. Results from 180 keV As+ and P+ implants at 20 mA and 5 x 10(15)/cm(2) dose are presented. The impact of PEF settings on n-mos and p-mos devices is shown, and correlated to both in situ charge monitors and CHARM (TM) wafers. This work underscores the importance of characterizing PEF operation to obtain optimum charge control.
引用
收藏
页码：561 / 564
页数：4
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