Investigation of TSV Metallization for MEMS Packaging Technology

The results of obtaining of metallized holes of 40 to 100 micrometers diameter in a silicon substrate of 300 micrometers thickness are presented. Deep plasma-chemical etching method with repetitive cycling of passivation and etching steps (the Bosch process) was used for holes formation. Silicon thermal oxidation method was used to form a dielectric layer. Metallization was carried out with a combination of magnetron sputtering and electrochemical deposition methods, 50 micrometers chromium sublayer and copper layer were deposited by magnetron sputtering. The copper conductive layer was expanded by electrodeposition. Such a combination of magnetron sputtering and electrodeposition ensures the best filling of the holes with a copper layer and fabrication reproducibility. It was shown also that a chamfer on the hole ends provides enhanced conditions for metal filling and eligible properties of interconnects. The developed technology can be used in 3D integration, MEMS packaging technology and fabrication of silicon interposers.