Floating Substrate Passive Voltage Contrast (FSPVC)

被引:0
|
作者
Jenkins, Mark W. [1 ]
Tangyunyong, Paiboon [1 ]
Cole, Edward I., Jr. [1 ]
Soden, Jerry M. [1 ]
Walraven, Jeremy A. [1 ]
Pimentel, Alejandro A. [1 ]
机构
[1] Sandia Natl Labs, Albuquerque, NM 87185 USA
来源
ISTFA 2006 | 2006年
关键词
D O I
暂无
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Light emission [1,2] and passive voltage contrast (PVC) [3,4] arc common failure analysis tools that can quickly identify and localize gate oxide short sites. In the past, PVC was not used on electrically floating substrates or SOI (silicon-on-insulator) devices due to the conductive path needed to "bleed off" charge. In PVC, the SEM's primary beam induces different equilibrium potentials on floating versus grounded (0 V) conductors, thus generating different secondary electron emission intensities for fault localization. Recently we obtained PVC signals on bulk silicon floating substrates and SOI devices. In this paper, we present details on identifying. and validating gate shorts utilizing this Floating Substrate PVC (FSPVC) method.
引用
收藏
页码:321 / 327
页数:7
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