Floating Substrate Passive Voltage Contrast (FSPVC)

被引:0
|
作者
Jenkins, Mark W. [1 ]
Tangyunyong, Paiboon [1 ]
Cole, Edward I., Jr. [1 ]
Soden, Jerry M. [1 ]
Walraven, Jeremy A. [1 ]
Pimentel, Alejandro A. [1 ]
机构
[1] Sandia Natl Labs, Albuquerque, NM 87185 USA
来源
ISTFA 2006 | 2006年
关键词
D O I
暂无
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Light emission [1,2] and passive voltage contrast (PVC) [3,4] arc common failure analysis tools that can quickly identify and localize gate oxide short sites. In the past, PVC was not used on electrically floating substrates or SOI (silicon-on-insulator) devices due to the conductive path needed to "bleed off" charge. In PVC, the SEM's primary beam induces different equilibrium potentials on floating versus grounded (0 V) conductors, thus generating different secondary electron emission intensities for fault localization. Recently we obtained PVC signals on bulk silicon floating substrates and SOI devices. In this paper, we present details on identifying. and validating gate shorts utilizing this Floating Substrate PVC (FSPVC) method.
引用
收藏
页码:321 / 327
页数:7
相关论文
共 50 条
  • [21] Gate Oxide Defect Localization by Using Passive Voltage Contrast with High Energy Incident Beam
    He, Ming
    Guo, Oliver
    Wang, Sean
    Li, Peter
    Zhang, Mark
    Chien, Kary
    Zhao, XiangFu
    PROCEEDINGS OF THE 2016 IEEE 23RD INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA), 2016, : 201 - 204
  • [22] FLOATING GALLSTONES - THE ROLE OF CONTRAST MATERIAL
    SCHESKE, GA
    COOPERBERG, PL
    COHEN, MM
    BURHENNE, HJ
    JOURNAL OF CLINICAL ULTRASOUND, 1980, 8 (03) : 227 - 231
  • [23] DEVELOPMENTS IN VOLTAGE CONTRAST
    GIRARD, P
    SCANNING MICROSCOPY, 1988, 2 (01) : 151 - 160
  • [24] A Case Study: Improving FIB Passive Voltage Contrast Imaging for Deep N-well Circuits
    Mulder, Randal
    ISTFA 2015: CONFERENCE PROCEEDINGS FROM THE 41ST INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS, 2015, : 364 - 373
  • [25] Failure analysis for the 0.13 μm Cu/low K (Black Diamond™) interconnection by the passive voltage contrast
    Li, HY
    Su, YJ
    Tsang, CF
    Yew, WCP
    Koh, ML
    Wong, LY
    Tang, LJ
    Li, WH
    Chang, CK
    Vladimir, B
    Zhang, L
    PROCEEDINGS OF 5TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, 2003, : 342 - 345
  • [26] Voltage-Mode All-Pass Filter Passive Scheme Based on Floating Negative Resistor and Grounded Capacitor
    Herencsar, Norbert
    Koton, Jaroslav
    Vrba, Kamil
    Minaei, Shahram
    Goknar, Izzet Cem
    2015 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), 2015, : 400 - 403
  • [27] CMOS voltage controlled floating resistor
    Elwan, HO
    Mahmoud, SA
    Soliman, AM
    INTERNATIONAL JOURNAL OF ELECTRONICS, 1996, 81 (05) : 571 - 576
  • [28] A low voltage CMOS floating resistor
    Mahmoud, SA
    ICEEC'04: 2004 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONIC AND COMPUTER ENGINEERING, PROCEEDINGS, 2004, : 453 - 456
  • [29] A simple passive floating memristor emulator circuit
    Wu, Shien
    Shi, Ge
    Huang, Yuqing
    Wang, Chenyu
    Lin, Rubin
    Shi, Mang
    Sun, Yanwei
    Wang, Binrui
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2024, 177
  • [30] Passive and active floating torque during swimming
    Per-Ludvik Kjendlie
    Robert Keig Stallman
    James Stray-Gundersen
    European Journal of Applied Physiology, 2004, 93 : 75 - 81