Solving the Voltage Contrast on floating substrate with standard FA toolset

被引：0

作者：

Goxe, Julien ^{[1
]}

Vanhuffel, Beatrice ^{[1
]}

Castignolles, Marie ^{[1
]}

Zirilli, Thomas ^{[1
]}

机构：

[1] NXP, Analog Mixed Signal Investigat Lab, Toulouse, France

来源：

ISTFA 2016: CONFERENCE PROCEEDINGS FROM THE 42ND INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS | 2016年

关键词：

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOT) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOT substrate.

引用

页码：229 / 233

页数：5

共 20 条

[1] Floating Substrate Passive Voltage Contrast (FSPVC)
Jenkins, Mark W.
Tangyunyong, Paiboon
Cole, Edward I., Jr.
Soden, Jerry M.
Walraven, Jeremy A.
Pimentel, Alejandro A.
ISTFA 2006, 2006, : 321 - 327
[2] Emission microscope and passive voltage contrast: solving a problem quickly
Advanced Micro Devices
III-Vs Review, 1996, 9 (06):
[3] Passive Voltage Contrast Investigation of Metal/Via Stack Connecting to Substrate
Shen, Yi Qiang
Irene, Tee
Zhu, Jie
Mo, Zhi Qiang
2018 25TH IEEE INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA), 2018,
[4] IMPROVEMENT OF VOLTAGE CONTRAST IN THE SCANNING ELECTRON-PROBE BY FLOATING THE GROUND-LEVEL OF A DEVICE
FURUKAWA, Y
GOTA, Y
INAGAKI, T
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY, 1979, 16 (06): : 1853 - 1855
[5] LOW PROGRAMMING VOLTAGE FLOATING GATE ANALOG MEMORY CELLS IN STANDARD VLSI CMOS TECHNOLOGY
DURFEE, DA
SHOUCAIR, FS
ELECTRONICS LETTERS, 1992, 28 (10) : 925 - 927
[6] SUBSTRATE RESPONSE OF A FLOATING GATE N-CHANNEL MOS MEMORY CELL SUBJECT TO A POSITIVE LINEAR RAMP VOLTAGE
LEE, HS
LOWRIE, DS
SOLID-STATE ELECTRONICS, 1981, 24 (03) : 267 - 273
[7] A Wide-Range, High-Voltage, Floating Level Shifter with Charge Refreshing in a Standard 180 nm CMOS Process
Palomeque-Mangut, David
Rodriguez-Vazquez, Angel
Delgado-Restituto, Manuel
2022 IEEE 13TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS), 2022, : 109 - 112
[8] Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits
Hooper, M
Kucic, M
Hasler, P
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 125 - 128
[9] Endocardial voltage mapping is superior to contrast-enhanced magnetic resonance for imaging of myocardial substrate of right ventricular tachycardia
Marra, M. Perazzolo
Zorzi, A.
Migliore, F.
Bauce, B.
Leoni, L.
Basso, C.
Buja, G.
Thiene, G.
Iliceto, S.
Corrado, D.
EUROPEAN HEART JOURNAL, 2011, 32 : 795 - 795
[10] EFFECT OF WELL AND SUBSTRATE PARAMETERS ON THE LATCHUP DEGRADATION OF CMOS STRUCTURES DURING E-BEAM VOLTAGE CONTRAST MEASUREMENTS
ROCHE, FM
BOCUS, SD
GIRARD, P
MICROELECTRONIC ENGINEERING, 1991, 15 (1-4) : 113 - 116

← 1 2 →