Performance evaluation tool for rapid prototyping of hardware-software codesigns

被引:4
|
作者
Chatha, KS [1 ]
Vemurid, R [1 ]
机构
[1] Univ Cincinnati, Dept ECECS, Cincinnati, OH 45221 USA
关键词
D O I
10.1109/IWRSP.1998.676695
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Performance evaluation is essential for tradeoff analysis during rapid prototyping. Existing performance evaluation strategies based on co-simulation and static analyses are either too slow or error prone. We therefore present an intermediate approach based on profiling and scheduling for rapid prototyping of hardware-software codesigns. Our performance evaluation tool obtains representative task timings by profiling which is done simultaneously with system specification. During design space exploration the tool obtains performance estimates by using well known scheduling and novel re-timing heuristics. It is capable of obtaining both non-pipelined and pipelined schedules. The tool includes an area estimator which calculates the amount of hardware area required by the design by taking resource sharing between different hardware tasks in to account. The tool also allows the user to evaluate the performance of a particular schedule with different task timings. In contrast to co-simulation and static analysis, the tool is able to provide fast and accurate performance estimates. The effectiveness of the tool in a rapid-prototyping environment is demonstrated by a case study.
引用
收藏
页码:218 / 224
页数:7
相关论文
共 50 条
  • [41] Rapid prototyping of hardware/software codesign for embedded signal processing
    Hwang, YT
    Wang, YH
    Hwang, JS
    JOURNAL OF INFORMATION SCIENCE AND ENGINEERING, 1998, 14 (03) : 605 - 632
  • [42] In pursuit of hardware-software codesign
    Garber, L
    Sims, D
    COMPUTER, 1998, 31 (06) : 12 - 14
  • [43] Hardware-software interactions on Mpact
    Kalapathy, P
    IEEE MICRO, 1997, 17 (02) : 20 - 26
  • [44] Hardware-Software Co-Design for Network Performance Measurement
    Narayana, Srinivas
    Sivaraman, Anirudh
    Nathan, Vikram
    Alizadeh, Mohammad
    Walker, David
    Rexford, Jennifer
    Jeyakumar, Vimalkumar
    Kim, Changhoon
    PROCEEDINGS OF THE 15TH ACM WORKSHOP ON HOT TOPICS IN NETWORKS (HOTNETS '16), 2016, : 190 - 196
  • [45] Embedded software verification in hardware-software codesign
    Hsiung, PA
    JOURNAL OF SYSTEMS ARCHITECTURE, 2000, 46 (15) : 1435 - 1450
  • [46] ADVANCED MINICOMPUTER DESIGNED BY TEAM EVALUATION OF HARDWARE-SOFTWARE TRADEOFFS
    CONKLIN, PF
    RODGERS, DP
    COMPUTER DESIGN, 1978, 17 (04): : 129 - 137
  • [47] A High Performance Algorithm for Scheduling and Hardware-Software Partitioning on MPSoCs
    Youness, Hassan
    Hassan, Mohammed
    Sakanushi, Keishi
    Takeuchi, Yoshinori
    Imai, Masaharu
    Salem, Ashraf
    Wahdan, Abdel-Moniem
    Moness, Mohammed
    DTIS: 2009 4TH IEEE INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA, PROCEEDINGS, 2009, : 71 - +
  • [48] Economical development of software and hardware-software products
    Eur Space Agency Brochure ESA BR, BR-154 (18):
  • [49] Performance Evaluation of Genetic Algorithm to Solve Hardware-Software Partitioning Design: A Factorial Design Analysis
    Tan, Eam Tzeh
    Halim, Zaini Abdul
    TENCON 2017 - 2017 IEEE REGION 10 CONFERENCE, 2017, : 439 - 442
  • [50] Architecture exploration for 3G telephony applications using a Hardware-Software prototyping platform
    Charot, F
    Nyamsi, M
    Quinton, P
    Wagner, C
    COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, 2004, 3133 : 244 - 253