Package on Package DDR Power Integrity Design

被引:0
|
作者
Shu, Heng Chuan [1 ]
Quek, Li Chuang [1 ]
机构
[1] Intel Microelect Malaysia, Bayan Lepas 11900, Penang, Malaysia
关键词
power delivery; DDR; Package on package (PoP); System On Chip (SoC);
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The IC (integrated circuit) packaging technology has evolved and transitioned from wirebond to flipchip, multi-chip package (MCP) to 3D stacking. PoP (Package on Package) enables the vertical integration of memory on the conventional package which helps to achieve higher component density on the platform. PoP technology is very important for modern electronics devices as it features more function in very compact devices such as smart phones and tablets. While PoP offers denser component count on platform, it also comes with electrical challenges such as Power Integrity issue. Conventional Power Integrity Design and Methodology may not hold for PoP technology.
引用
收藏
页码:559 / 562
页数:4
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