Gate CD control considering variation of gate and STI structure

被引：0
|
作者：
Kurihara, Masaru [1 ]
Tanaka, Jun'ichi [1 ]
Izawa, Masaru [1 ]
Kawai, Kenji [2 ]
Fujiwara, Nobuo [2 ]
机构：
[1] Hitachi Ltd, Cent Res Lab, Tokyo 1858601, Japan
[2] Renesas Technol Corp, Proc Dev Dept, Itami, Hyogo 6640005, Japan
来源：
ISSM 2006 CONFERENCE PROCEEDINGS- 13TH INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING | 2006年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We have developed a fab-wide APC system to control critical dimension (CD) of gate electrode length. We have also developed a model equation to predict gate CD by considering the structures of gate electrode and STI. This prediction model was also used to do factor analysis of gate CD variation. Effectiveness of the prediction model for feedforward control was evaluated by both simulation and experiment.
引用
收藏
页码：95 / +
页数：2
相关论文
共 50 条
  • [1] Gate CD control considering variation of gate and STI structure
    Kurihara, Masaru
    Izawa, Masaru
    Tanaka, Jun'ichi
    Kawai, Kenji
    Fujiwara, Nobuo
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2007, 20 (03) : 232 - 238
  • [2] Statistical analysis of gate CD variation for yield optimization
    Holwill, Juliet
    Kye, Jongwook
    Zou, Yi
    DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION, 2007, 6521
  • [3] Improvement of gate oxide breakdown through STI structure Modification in DRAM
    Park, Dong-Sik
    Chang, Ji-Hoon
    Shin, Su-Ho
    Kim, Chang-Sik
    Ahn, Yongsoo
    Choi, Byoungdeog
    SOLID-STATE ELECTRONICS, 2025, 225
  • [4] CD control of ASIC polysilicon gate level
    Tyminski, JK
    McNamara, SJ
    Meisner, SA
    Gorham, RR
    OPTICAL MICROLITHOGRAPHY XI, 1998, 3334 : 607 - 619
  • [5] Spectroscopic CD technology for gate process control
    Levy, A
    Lakkapragada, S
    Mieher, W
    Bhatia, K
    Whitney, U
    Hankinson, M
    2001 IEEE INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING, CONFERENCE PROCEEDINGS, 2001, : 141 - 144
  • [6] A Metal Gate Height Variation Control Method by the Metal Gate Etch at the FinFET Technology
    Tu, Wutao
    Wang, Yan
    Qiu, Jing
    Zhang, Haiyang
    2022 33RD ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE (ASMC), 2022,
  • [7] Stacked Gate FinFET with Gate Extension for Improved Gate Control
    Sangeeta Mangesh
    Chopra P.
    Saini K.
    Russian Microelectronics, 2018, 47 (6) : 443 - 448
  • [8] THE GATE - LEWIS,CD
    THWAITE, A
    ENCOUNTER, 1962, 19 (03): : 81 - 84
  • [9] GATE STRUCTURE FOR MIDGAP GATE CMOS.
    Anon
    1600, (29):
  • [10] FOLDED GATE - A NOVEL LOGIC GATE STRUCTURE
    SHUR, M
    IEEE ELECTRON DEVICE LETTERS, 1984, 5 (11) : 454 - 455
12345