A Distributed Model for Border Traps in Al2O3 - InGaAs MOS Devices

被引：163

作者：

Yuan, Yu ^{[1
]}

Wang, Lingquan ^{[1
]}

Yu, Bo ^{[1
]}

Shin, Byungha ^{[2
]}

Ahn, Jaesoo ^{[2
]}

McIntyre, Paul C.

Asbeck, Peter M. ^{[1
,2
]}

Rodwell, Mark J. W.

Taur, Yuan ^{[1
]}

机构：

[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA

[2] Stanford Univ, Dept Mat Sci & Engn, Stanford, CA 94305 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2011年 / 32卷 / 04期

关键词：

Border trap; MOS; tunneling; III-V;

D O I：

10.1109/LED.2011.2105241

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A distributed border trap model based on tunneling between the semiconductor surface and trap states in the gate dielectric film is formulated to account for the observed frequency dispersion in the capacitance and conductance of Al2O3/InGaAs MOS devices biased in accumulation. The distributed circuit model is more physical and descriptive than previous lumped circuit border trap models in the literature. The distributed model correctly depicts the frequency dependence of both capacitance and conductance data in accumulation. A border trap volume density is extracted from the quantitative agreement with measured data.

引用

页码：485 / 487

页数：3

共 50 条

[1] A Distributed Bulk-Oxide Trap Model for Al2O3 InGaAs MOS Devices
Yuan, Yu
Yu, Bo
Ahn, Jaesoo
McIntyre, Paul C.
Asbeck, Peter M.
Rodwell, Mark J. W.
Taur, Yuan
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (08) : 2100 - 2106
[2] Influence of the spatial distribution of border traps in the capacitance frequency dispersion of Al2O3/InGaAs
Palumbo, Felix
Aguirre, Fernando L.
Pazos, Sebastian M.
Krylov, Igor
Winter, Roy
Eizenberg, Moshe
SOLID-STATE ELECTRONICS, 2018, 149 : 71 - 77
[3] Evidence of distributed energy border traps at Al2O3/p-diamond interface
Pohekar, Prachi
Parvez, Bazila
Ganguly, Swaroop
Saha, Dipankar
DIAMOND AND RELATED MATERIALS, 2022, 128
[4] RADIATION RESISTANCE OF AL2O3 MOS DEVICES
ZAININGER, KH
WAXMAN, AS
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1969, ED16 (04) : 333 - +
[5] Border trap reduction in Al2O3/InGaAs gate stacks
Tang, Kechao
Winter, Roy
Zhang, Liangliang
Droopad, Ravi
Eizenberg, Moshe
McIntyre, Paul C.
APPLIED PHYSICS LETTERS, 2015, 107 (20)
[6] BORDER TRAPS IN MOS DEVICES
FLEETWOOD, DM
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1992, 39 (02) : 269 - 271
[7] Profiling Border-Traps by TCAD analysis of Multifrequency CV-curves in Al2O3/InGaAs stacks
Caruso, E.
Lin, J.
Burke, K. F.
Cherkaoui, K.
Esseni, D.
Gity, F.
Monaghan, S.
Palestri, P.
Hurley, P.
Seimi, L.
2018 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS), 2018, : 153 - 156
[8] Gate leakage properties in (Al2O3/HfO2/Al2O3) dielectric of MOS devices
Nasrallah, S. Abdi-ben
Bouazra, A.
Poncet, A.
Said, M.
THIN SOLID FILMS, 2008, 517 (01) : 456 - 458
[9] Investigation of interface, border and bulk traps of Al2O3/(3-Ga2O3 MOS capacitors via O2 plasma treatment
Du, Song
Lin, Yuxiang
Xu, Hao
Long, Hao
MICRO AND NANOSTRUCTURES, 2025, 198
[10] Understanding the Impact of Annealing on Interface and Border Traps in the Cr/HfO2/Al2O3/MoS2 System
Zhao, Peng
Padovani, Andrea
Bolshakov, Pavel
Khosravi, Ava
Larcher, Luca
Hurley, Paul K.
Hinkle, Christopher L.
Wallace, Robert M.
Young, Chadwin D.
ACS APPLIED ELECTRONIC MATERIALS, 2019, 1 (08) : 1372 - 1377

← 1 2 3 4 5 →