Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application

被引：110

作者：

Peng, Chunyu ^{[1
]}

Huang, Jiati ^{[1
]}

Liu, Changyong ^{[1
]}

Zhao, Qiang ^{[1
]}

Xiao, Songsong ^{[1
]}

Wu, Xiulong ^{[1
]}

Lin, Zhiting ^{[1
]}

Chen, Junning ^{[1
]}

Zeng, Xuan ^{[2
]}

机构：

[1] Anhui Univ, Sch Elect & Informat Engn, Hefei 230601, Anhui, Peoples R China

[2] Fudan Univ, Sch Microelect, ASIC & Syst State Key Lab, Shanghai 201203, Peoples R China

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2019年 / 27卷 / 02期

基金：

中国国家自然科学基金;

关键词：

High speed; low power; radiation-hardened SRAM; single-event-multiple-node upsets (SEMNUs); Ssingle-event upset (SEU); EVENT TRANSIENTS; DESIGN; TOLERANT; CELL; UPSET; SEU;

D O I：

10.1109/TVLSI.2018.2879341

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, a novel radiation-hardened 14-transistor SRAM bitcell with speed and power optimized [radiation-hardened with speed and power optimized (RSP)-14T] for space application is proposed. By circuit-and layout-level optimization design in a 65-nm CMOS technology, the 3-D TCAD mixed-mode simulation results show that the novel structure is provided with increased resilience to single-event upset as well as single-event-multiple-node upsets due to the charge sharing among OFF-transistors. Moreover, the HSPICE simulation results show that the write speed and power consumption of the proposed RSP-14T are improved by similar to 65% and similar to 50%, respectively, compared with those of the radiation hardened design (RHD)-12T memory cell.

引用

页码：407 / 415

页数：9

共 48 条

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