Radiation hardened 12T SRAM cell with improved writing capability for space applications

被引:0
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作者
Sharma, Rishabh [1 ]
Mondal, Debabrata [2 ]
Shah, Ambika Prasad [2 ]
机构
[1] Department of Electronics and Communication Engineering, National Institute of Technology Srinagar, J&K, 190006, India
[2] IC-ResQ Lab., Department of Electrical Engineering, Indian Institute of Technology Jammu, J&K, 181221, India
关键词
Access time - CMOS technology - Radiation-hardened - Radiation-hardened-by-design - Single event upsets - Space radiation environment - SRAM Cell - Storage nodes - Write access time - Writing capability;
D O I
10.1016/j.memori.2023.100071
中图分类号
学科分类号
摘要
This paper presents an inventive and extremely dependable radiation-hardened by-design (RHBD) 12T SRAM Cell with enhanced writing capability (RHWC-12T) for a space radiation environment. The Proposed RHWC-12T SRAM is designed on Cadence Virtuoso with quad-storage nodes and simulated in 45-nm CMOS technology with the supply voltage of 1.1 V and 27∘C operating temperature. The proposed cell is tolerant to both 0 to 1 and 1 to 0 SEUs (Single event upsets). Also, it provides better speed and stability compared to the other considered SRAM cells such as 6T, 10T Dohar, Quatro, We-Quatro, QUCCE-12T, and NQuatro. According to simulation findings, the proposed SRAM cell provides 1.053× better writing stability than the 10T Dohar SRAM cell. In addition, the write access time improves by 3.56× with 1.36× area overhead than 10T Dohar SRAM cell. © 2023 The Author(s)
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