On-Chip Hardware Accelerators for Data Processing and Combinatorial Search

被引:0
|
作者
Sklyarov, Valery [1 ]
Skliarova, Iouliia [1 ]
机构
[1] Univ Aveiro, Dept Elect Telecommun & Informat IEETA, Aveiro, Portugal
关键词
Data processing; combinatorial search; high-performance computing; parallelism; programmable systems-on-chip; IMPLEMENTATION;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Data processing and combinatorial search are widely used techniques in the scope of information and communication. Examples of practical applications are sorting, frequent items encountering, matrix/set covering, graph/map coloring, data mining, priority management, and many others. Often information/data processing that involves the listed above tasks has to be done in embedded systems where high performance needs to be achieved in portable and low-cost devices integrating multiple functions and capabilities. An efficient development technique for such systems is hardware/software co-design with the use of programmable systems-on-chip that are highly integrated, easily customizable/configurable and permit broad parallelism to be supported that is the primary way to accelerate computations. The tutorial is dedicated to such a design technique.
引用
收藏
页码:52 / 56
页数:5
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