On-Chip Hardware Accelerators for Data Processing and Combinatorial Search

被引:0
|
作者
Sklyarov, Valery [1 ]
Skliarova, Iouliia [1 ]
机构
[1] Univ Aveiro, Dept Elect Telecommun & Informat IEETA, Aveiro, Portugal
关键词
Data processing; combinatorial search; high-performance computing; parallelism; programmable systems-on-chip; IMPLEMENTATION;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Data processing and combinatorial search are widely used techniques in the scope of information and communication. Examples of practical applications are sorting, frequent items encountering, matrix/set covering, graph/map coloring, data mining, priority management, and many others. Often information/data processing that involves the listed above tasks has to be done in embedded systems where high performance needs to be achieved in portable and low-cost devices integrating multiple functions and capabilities. An efficient development technique for such systems is hardware/software co-design with the use of programmable systems-on-chip that are highly integrated, easily customizable/configurable and permit broad parallelism to be supported that is the primary way to accelerate computations. The tutorial is dedicated to such a design technique.
引用
收藏
页码:52 / 56
页数:5
相关论文
共 50 条
  • [21] Reconfigurable combinatorial accelerators for real time processing
    Skliarova, I
    Ferrari, AB
    SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS, 2003, : 61 - 70
  • [22] On-chip Data Security against Untrustworthy Software and Hardware IPs in Embedded Systems
    Gundabolu, SreeCharan
    Wang, Xiaofang
    2018 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2018, : 644 - 649
  • [23] Hardware/Software Co-design in Extensible Processing Platforms for Combinatorial Search Algorithms
    Skliarova, Iouliia
    Sklyarov, Valery
    Rjabov, Artjom
    Sundnitson, Alexander
    2014 17TH IEEE MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (MELECON), 2014, : 462 - 466
  • [24] Determination of On-Chip Temperature Gradients on Reconfigurable Hardware
    Tradowsky, Carsten
    Cordero, Enrique
    Deuser, Thorsten
    Huebner, Michael
    Becker, Juergen
    2012 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2012,
  • [25] ON-CHIP HARDWARE SUPPORTS COMPUTER SECURITY FEATURES
    WELLS, P
    ELECTRONICS, 1984, 57 (05): : 128 - 130
  • [26] Efficient rate adjustment hardware for on-chip learning
    Rezaie, MG
    Farbiz, F
    Behnam, A
    ICCDCS 2004: Fifth International Caracas Conference on Devices, Circuits and Systems, 2004, : 98 - 102
  • [27] A Benchmark Suite of Hardware Trojans for On-Chip Networks
    Wang, Jian
    Guo, Shize
    Chen, Zhe
    Zhang, Tao
    IEEE ACCESS, 2019, 7 : 102002 - 102009
  • [28] A Threat of Malicious Hardware Using On-chip Voltmeter
    Fujimoto, Daisuke
    Miyachi, Ryo
    Matsumoto, Tsutomu
    2017 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2017, : 96 - 98
  • [29] A Reconfigurable On-chip multichannel Data Acquisition and Processing (DAQP) system for multichannel signal processing
    Velmurugan, S.
    Rajasekaran, C.
    2013 INTERNATIONAL CONFERENCE ON PATTERN RECOGNITION, INFORMATICS AND MEDICAL ENGINEERING (PRIME), 2013,
  • [30] High-Performance Hardware Accelerators for Next Generation On-Board Data Processing
    Paschalis, Antonis
    Chatziantoniou, Panagiotis
    Theodoropoulos, Dimitris
    Tsigkanos, Antonis
    Kranitis, Nektarios
    PROCEEDINGS OF THE 2022 IFIP/IEEE 30TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2022,