FPGA prototype of the REALJava']Java co-processor

被引:0
|
作者
Sannti, Tero [1 ,2 ]
Tyystjaervi, Joonas [1 ,2 ]
Plosila, Juha [2 ,3 ]
机构
[1] Turku Ctr Comp Sci, Turku, Finland
[2] Univ Turku, Dept Informat Technol, SF-20500 Turku, Finland
[3] Acad Finland, Res Council Nat Sci & Engn, Helsinki, Finland
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the FPGA prototype of the REALJava co-processor. The virtual machine architecture is described along with the modifications required in the FPGA environment. The FPGA prototype is relevant, as it allows a realistic throughput between the CPU and the co-processor and provides the whole system with a more realistic CPU performance in respect to embedded environments. Our co-processor is designed in a highly modular fashion, especially separating the communication from the actual core. This modularity of the design makes the co-processor more reusable and allows system level scalability. This work is a part of a project focusing on design of an advanced Java co-processor for Java intensive SoC applications.
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页码:70 / +
页数:2
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